CVE-2026-99099
Description
A flaw was found in the Linux kernel. On systems running affected AMD processors without microcode fixes, the processor may fail to properly clear cached entries in the Translation Lookaside Buffer (TLB), a hardware cache used to speed up memory address translation, during flush operations. A local user could exploit this condition to cause stale address mappings to persist, potentially leading to memory corruption, denial of service, or unauthorized information disclosure.
Statement
This vulnerability is rated as having a Moderate impact for Red Hat because successful exploitation requires local user access and complex timing to trigger the erratum on specific AMD hardware. The issue cannot be exploited remotely and depends on processor-level broadcast invalidation instructions that are not present or enabled in earlier enterprise distributions such as Red Hat Enterprise Linux 7, 8, and 9. On supported platforms utilizing these instructions without platform microcode workarounds, an authenticated local attacker could potentially access stale address translations to cause memory corruption or a denial of service.
Mitigation
--- CME Mitigation Guidance (2026-11-02) ---
Disclaimer: The following mitigation solutions are provided as a courtesy, pending the application of an official patch. This content was generated utilizing AI tools in conjunction with data from https://cmetaxonomy.org. Customers are advised to independently evaluate and test these temporary mitigations within their own infrastructure.
The highest-value action is to apply updated AMD processor microcode or emit an additional TLBSYNC instruction during kernel TLB invalidation flushes on Zen 5 processors: upgrade to Linux kernel 6.18.57, 7.2.11, 7.3+ (or the fixed Kernel/Kernel Ivos Qualcomm builds), which detect the erratum during Zen 5 initialization to set X86_BUG_TLBI and emit an additional TLBSYNC instruction in __tlbsync() when the bug flag is present, closing stale TLB mapping reuse. Until patched, this is only a concern on Linux systems running on affected AMD Zen 5 hardware supporting INVLPGB without microcode remediation — systems with CPU microcode fix TLBSYNC_SFW_NO and platforms without INVLPGB instruction support are unaffected — so restrict unprivileged local user access and apply updated processor microcode addressing erratum 1718. As a compensating measure, run SELinux in enforcing mode to provide OS containment and constrain post-exploitation actions if stale TLB translation reuse occurs. These controls limit blast radius and contain exploitation, but they do not fix the underlying TLB invalidation hardware erratum — apply the upstream patch to fully remediate.
Highest-impact CME: CME-301 SELinux (Enforcing Mode) (medium)
Common Vulnerability Scoring System (CVSS) Score Details
Info alert:Important note
CVSS scores for open source components depend on vendor-specific factors (e.g. version or build chain). Therefore, Red Hat's score and impact rating can be different from NVD and other vendors. Red Hat remains the authoritative CVE Naming Authority (CNA) source for its products and services (see Red Hat classifications).
The following CVSS metrics and score provided are preliminary and subject to review.
CVSS v3 Score Breakdown
| Red Hat | NVD | cve.org | |
|---|---|---|---|
| Base Score | 7 | N/A | 7.8 |
| Attack Vector | Local | N/A | Local |
| Attack Complexity | High | N/A | Low |
| Privileges Required | Low | N/A | Low |
| User Interaction | None | N/A | None |
| Scope | Unchanged | N/A | Unchanged |
| Confidentiality | High | N/A | High |
| Integrity Impact | High | N/A | High |
| Availability Impact | High | N/A | High |
Vector
Red Hat: CVSS:3.1/AV:L/AC:H/PR:L/UI:N/S:U/C:H/I:H/A:H
cve.org: CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:H/A:H
Understanding the Weakness (CWE)
Other
Technical Impact: Quality Degradation; Varies by Context
Frequently Asked Questions
Not sure what something means? Check out our Security Glossary.
Want to get errata notifications? Sign up here.
