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  • Implementation of driver code for generating High Precision Event Timer(HPET) interrupts as Processor Message Delivery Option

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    Hi Sir,

    In our BIOS HPET Timers are enabled as processor Message Delivery options as attached in screenshot.
    So, as per the attached document ("564464_HPET.pdf") of HPET released by Intel:

    6.2.4.3 Mapping Option #3 (Processor Message Option)

    In this case, the interrupts are mapped directly to processor messages without going to
    the 8259 or I/O (x) APIC. To use this mode, the interrupt must be configured to edge-
    triggered mode. The Tn_PROCMSG_EN_CNF bit must be set to enable this mode.
    When the interrupt is delivered to the processor, the message is delivered to the
    address indicated in the Tn_PROCMSG_INT_ADDR field. The data value for the write
    cycle is specified in the Tn_PROCMSG_INT_VAL field.

    Note:
    The processor message interrupt delivery option has HIGHER priority and is mutually
    exclusive to the standard interrupt delivery option. Thus, if the Tn_PROCMSG_EN_CNF
    bit is set, the interrupts will be delivered directly to the processor, rather than by
    means of the APIC or 8259.
    The processor message interrupt delivery can be used even when the legacy mapping
    is used.

    I am using following hardware and software.
    OS : RHEL 7.8
    Intel Core i7- 7th Gen Com-Express processor.

    We have a immediate requirement of implementation of HPET Timers for our project.
    Can you please guide or provide the driver code for implementation of HPET Timers as Processor Message Options and procedure or sample code to access these HPET timers from user space applications.

    HPET Timers in BIOS
    Thanks & Regards
    Krishna Reddy
    BEL, Bangalore
    080-22195076
    9620620953HPET Timers in BIOSHPET Timers in BIOSHPET Timers in BIOS

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