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Star IP

Fully Synthesizable Versions of Leading CPU and DSP Cores Synopsys offers more than 25,000 design engineers who use the DesignWare® Library and the DesignWare Verification Library access to high-performance cores from leading Star IP providers such as Altera. The Design Views of the DesignWare Star IP core, which include simulation and timing models, verification environment and full documentation, are available to all DesignWare Library and DesignWare Verification Library licensees at no additional cost. For an additional fee, DesignWare Library customers may license the Implementation Views. The Implementation Views include the synthesizable RTL, tool scripts, and verification suite required to implement the design. Implementation Views of the DesignWare Star IP Cores are available from the respective IP owner (and Synopsys, in the case of Nios II). Synopsys provides design and implementation support for the DesignWare Star IP cores. Available DesignWare Star IP Cores: Altera's Nios II Processor core For more information on DesignWare Contact us Note: A signed, most recent version of the Synopsys End User License Agreement (or a DesignWare Supplement to an existing Synopsys EULA) is required to receive the Design Views of any DesignWare Star IP Core.

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Red Hat Certifications

This product has been certified to run on the following Red Hat products and technologies:

Target Product Level
Red Hat Enterprise Linux 6.x Self-Certified