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Questa CDC/Formal

The Questa® Clock-Domain Crossing (CDC) Verification solution focuses on the interaction between these clock domains. Questa CDC addresses a number of critical verification issues that simply cannot be dealt with by simulation-based verification techniques. An RTL or gate-level simulation of a design that has multiple clock domains does not accurately capture the timing related to the transfer of data between clock domains. As a consequence, simulation does not accurately predict silicon behavior, and critical bugs may escape the verification process. The Questa CDC Verification solution solves this problem. The Autocheck feature of the Questa Formal Verification tool from Mentor Graphics allows designers and verification engineers to quickly and easily verify that a design is free of many common functional design issues. This feature uses automatic assertion creation and formal sequential analysis to verify the design before a testbench is available and without user-written assertions.

Industry

Application/Software Development

Red Hat Certifications

This product has been certified to run on the following Red Hat products and technologies:

Target Product Level
Red Hat Enterprise Linux 5.x Self-Certified