3.3. TSC timer synchronization on Opteron CPUs

The current generation of AMD64 Opteron processors can be susceptible to a large gettimeofday skew. This skew occurs when both cpufreq and the Time Stamp Counter (TSC) are in use. MRG Realtime provides a method to prevent this skew by forcing all processors to simultaneously change to the same frequency. As a result, the TSC on a single processor never increments at a different rate than the TSC on another processor.

Procedure 3.2. Enabling TSC timer synchronization

  1. Open the /etc/grub.conf file in your preferred text editor and add the parameter clocksource=tsc powernow-k8.tscsync=1 to the MRG Realtime kernel. This forces the use of TSC and enables simultaneous core processor frequency transitions.
    ...[output truncated]...
    title Red Hat Enterprise Linux (realtime) (kernel-rtversion)
      root (hd0,0)
      kernel /vmlinuz-kernel-rtversion ro root=/dev/RHEL6/Root clocksource=tsc powernow-k8.tscsync=1
      initrd /initrd-kernel-rtversion.img
  2. You will need to restart your system for the changes to take effect.
Related Manual Pages
For more information, or for further reading, the following man pages are related to the information given in this section.
  • gettimeofday(2)